Title: Beyond-DieRouting: Challenges and Solutions
Speaker: Prof. Yao-Wen Chang
Deputy Vice President for Academic Affairs, National Taiwan University (NTU)
Distinguished Professor, Dept. of Electrical Engineering, NTU
Time: 9:30am-10:30am, January 10, 2017
The flip-chip packageand the emerging integrated fan-out (InFO) wafer-level chip-scale package (WLCSP)are introduced for modern IC designs with higher integration density, larger I/O counts, fasterspeed, better signal integrity, etc. To ease design changes, extrametal layers, called redistribution layers (RDLs), are introduced to redistribute nets between wire-bonding (I/O) pads in dies and bump pads in a package carrier, or among multiple dies. Such RDLrouting is performed by redistributing and interconnectingnetsbetween the I/O and bump pads or among multiple dies. As the design complexitygrows, routing has played a pivotal role in these beyond-die designs. Inthis talk, we first introduce popular flip-chip and InFO package structures, theirrouting-region modeling, and induced routing problems, survey keypublished techniques for such beyond-die routing with respect to specificstructures and pad assignment methods, and provide some futureresearch directions for the modern beyond-die routing problems.
Biography: Yao-Wen Chang received the B.S. degree in Computer Science from National Taiwan University (NTU) in 1988, and the M.S. and Ph.D. degrees in Computer Science from the University of Texas at Austin in 1993 and 1996, respectively.
He is an IEEE Fellow and the IEEE CEDA Vice President of Conferences. Currently, he is Deputy Vice President for Academic Affairs, NTU, Director of the Center for Teaching and Learning Development, NTU, and Distinguished Professor of the Dept. of Electrical Engineering and the Graduate Institute of Electronics Engineering (GIEE), NTU, Taiwan. He was an associate dean of the NTU College of EECS 2012-2016 and the chairman of the NTU GIEE 2010-2013. He was a visiting professor at Waseda University in Japan 2004-2010 and a visiting scholar at MIT in the US in 2014.
Dr. Chang received four awards at the 50th ACM/IEEE DAC in 2013, including the 1st Most Papers in the 5th Decade (34 DAC papers; #1 worldwide), etc. He is a 1st-place winner of six recent ACM/IEEE EDA contests (#1 worldwide, including the 2015 ISPD Detailed Routing-Driven Placement Contest). He has received 14 other top-3 contest awards during the past decade. Dr. Chang is a recipient of eight Best Paper Awards and the 2007 ICCAD Prof. Margarida Jacome Memorial Award. He has served as an associate editor of IEEE TCAD (2008-2013), IEEE TVLSI (2015-now), IEEE D&T (2013-2014, 2016-now), etc. He has served as the steering (executive) committee/general/program chairs of ICCAD and ISPD and program chairs of ASP-DAC and FPT, the chair of the EDA Consortium of MOE Taiwan, an independent board director of Genesys Logic, Inc, and a technical consultant of MediaTek Inc., RealTek Semiconductor Corp., and Faraday Technology Inc. Dr. Chang is a co-founder of Maxeda Technology.